Discussion in "PIC Microcontroller Discussion" started by    kingrosekhan123    Jul 17, 2012.
Tue Jul 17 2012, 11:21 pm
#1
Asalam o Alikum!
i want to see the example of interupts in C language.
There is some confussion to understand.
Please share the links..
Then i will ask question here..


[ Edited Wed Jul 18 2012, 12:42 am ]
Wed Jul 18 2012, 03:52 am
#2
Most compilers have their own way of implementing interrupt handlers.
Which compiler are you using ?
Wed Jul 18 2012, 11:43 am
#3
Am using C18 compiler
Wed Jul 18 2012, 05:05 pm
#4
try to do configuration at your own interrupt for C18 looks like as
#pragma code //always take care of this line also...
#pragma interrupt interrupt_ISR //used for high priority
void interrupt_ISR()
{
if(INTCONbits.TMR0IF==1)
{

T0_ISR();
}
if(PIR1bits.RCIF==1)
{

RC_ISR();
}
}

#pragma code My_HiPrio_Int=0X08 //#pragma code InterruptVectorHigh = 0x08
void My_HiPrio_Int(void) //interrupt using mplabc18 compiler................
{
_asm
GOTO interrupt_ISR
_endasm
}
T0_ISR() is an ISR subroutine.
 pravin_35 like this.
Wed Jul 18 2012, 06:43 pm
#5
if(INTCONbits.TMR0IF==1)
what its means?
i cant understand this.Explain this briefly.
Can i also use
if(RB1==1)
..
..??


[ Edited Wed Jul 18 2012, 06:45 pm ]
Wed Jul 18 2012, 09:18 pm
#6


if(INTCONbits.TMR0IF==1)
what its means?

kingrosekhan123


It means
If the bit called TMR0IF in register INTCONbits equals 1 (is set ) then .........



Can i also use
if(RB1==1)

kingrosekhan123


You can if RB1 has been defined as a particular bit position in a particular register.

If RB1 is just defined as a bit position it will not work.
Compilers try to make life easy for us, but they do it in different ways.
You have to get to know how your compiler does things.







Wed Jul 18 2012, 11:34 pm
#7
then how we understand that on what tiime (INTCONbits.TMR0IF==1) has become 1
Thu Jul 19 2012, 12:53 am
#8


then how we understand that on what tiime (INTCONbits.TMR0IF==1) has become 1

kingrosekhan123


I'm afraid don't understand what you are asking
Can you explain ?
Thu Jul 19 2012, 01:07 am
#9
#include <P18f458.h>
//#include <delay.h>

#pragma config PWRT =OFF
#pragma config BOR =OFF
#pragma config DEBUG =OFF
#pragma config OSC =HS // 4MHz Crystal, (HS oscillator)
#pragma config WDT =OFF // watch dog timer off
#pragma config LVP =OFF // Low voltage program off

#define RB6 PORTBbits.RB6

void chk_isr(void);
void T0_ISR(void);

#pragma interrupt chk_isr
void chk_isr(void)
{
if (INTCONbits.TMR0IF==1) //its says if INTCONbits.TMR0IF==1 then moves to T0_ISR,
T0_ISR();

}

#pragma code My_HiPrio_Int=0x0008
void My_HiPrio_Int (void)
{
_asm
GOTO chk_isr
_endasm
}
#pragma code
void main(void)
{
RB6=0;

TRISD=0;
T0CON=0x08;

TMR0H=0;
TMR0L=0;
INTCONbits.TMR0IF=0;
INTCONbits.TMR0IE=1;
T0CONbits.TMR0ON=1;
INTCONbits.PEIE=1;
INTCONbits.GIE=1;
while(1);
}
void T0_ISR(void)
{
PORTD++;
TMR0H=0;
TMR0L=0;
INTCONbits.TMR0IF=1;
}
/////////////////////////
this is the simple code that is just been copy and paste here.
this is the example in mazidi's book.
but didn't understand.its says timer0 cause interupt.
how its cause.?
just expalin it.why we store it into reg..and when the interupt comes??
Thu Jul 19 2012, 01:28 am
#10


but didn't understand.its says timer0 cause interupt. how its cause.?
just expalin it.why we store it into reg..and when the interupt comes??

kingrosekhan123





T0CON=0x08;
TMR0H=0;
TMR0L=0;
T0CONbits.TMR0ON=1;

kingrosekhan123



These lines setup timer 0 and start it.


INTCONbits.TMR0IF=0;
INTCONbits.TMR0IE=1;

kingrosekhan123




These lines enable timer 0 to generate an interrupt
when the timer reaches its maximum count.



INTCONbits.PEIE=1;
INTCONbits.GIE=1;

kingrosekhan123



These lines allow the interrupt from timer 0 to call the
interrupt handler.


This is complicated stuff
Your will need to study the data sheet to get a good knowledge of interrupts
on the 18fxxx series chips.

Note.. this is down to the hardware of the chip.
'c' can handle interrupts, but there is no set standard in 'c' as to how it is done.
All 'c' compilers will be different.

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