24FC1025-I/P EEPROM Memory Addressing

Hey guys, I've got a question regarding the memory layout of the 24FC1025-I/P.

According to the datasheet the way you write to this chip, through the I2C protocol, is by issuing a start, then your control byte, then the address high, then the address low, then the data, or whatnot. What is the address high/address low? I'm assuming that, because it's 1024 Kb, and it's set up to be 8 pages, the high address should be some number between 0 and 7 and the low address should be some number between 0 and 127. I might be totally wrong though. They specify the chip's range as 0FFFF-1FFFF.

The bottom line is that I'm having a terribly difficult time visualizing the addressing scheme.

I understand that the buffer of the device is 128 bytes, and that that is the maximum that I can write in one pass, but does each page have a specific address? When/where does each page start?

Is there some sort of diagram that I can see?

Thank you for your help.

The 24FC1025 chip is internally organized as two blocks of 512K, its similar to having two 512kbit EEPROMs on i2c bus. The control byte selects block 0 and block 1 depending on if you want to access lower 512k block or higher.



and sub-address(address low and address high) will range from 0000 - FFFF just like in normal 512k eeprom. so Individually address low and high both can range from 00-FF (00 to 255).