Discussion in "Project Help" started by    Pater    Apr 24, 2018.
Tue Apr 24 2018, 04:51 PM
#1
Basically, I am trying to interface ADC0808 with 89C51 microcontroller, but the digital output (8 -bits) from ADC is not coming in the desired way, it is showing the random values for a given input.
I am trying to take digital data of a single input (analog) channel and the clock is generated using programming of 89C51.

Here is the code I have used,

#include<reg51.h>

void delay_sec(unsigned int);
void delay_us(unsigned int);
void InitADC(void);
unsigned char ReadADC(unsigned char);

#define AN0 0
#define AN1 1
#define AN2 2
#define AN3 3

sbit Add_A = P2^0;
sbit Add_B = P2^1;
sbit Add_C = P2^2;
sbit ALE = P2^3;
sbit EOC = P2^4;
sbit OE = P2^5;
sbit START = P2^6;
sbit CLK = P2^7;


#define Data_Bus P0
#define HalfCycleDelay 10 // usecs


void main()
{

unsigned char I;
InitADC();


while(1)
{

I= ReadADC(AN0);

}

}

void InitADC(void)
{
Add_A = 0;
Add_B = 0;
Add_C = 0;
ALE = 0;
EOC = 1;
OE = 0;
START = 0;
CLK = 0;
Data_Bus = 0xFF;
}

unsigned char ReadADC(unsigned char Channel)
{
unsigned int i = 0;
unsigned int ADC_value = 0;

/*Selecting analog Channel by providing respective
bits to A,B,C addresses*/
switch(Channel)
{
case AN0: Add_C = 0; Add_B = 0; Add_A = 0; break;

}

delay_us(HalfCycleDelay); // 250kHz Frequency
ALE = 1; // Enable Address Latch
CLK = 1; // Make CLK High
delay_us(HalfCycleDelay); // 250kHz Frequency
CLK = 0; // Make CLK Low
START = 1; // Start ADC Conversion
delay_us(HalfCycleDelay); // 250kHz Frequency
CLK = 1; // Make CLK High
ALE = 0; // Disable Address Latch
delay_us(HalfCycleDelay); // 250kHz Frequency
CLK = 0; // Make CLK Low
START = 0; // Complete the start pulse

for(i=0;i<2000;i++)
{
CLK = !CLK; // Toggle Clock
delay_us(HalfCycleDelay); // 250kHz Frequency
if(!EOC) // Wait for EOC to be low
break;
}

for(i=0;i<2000;i++)
{
CLK = !CLK; // Toggle Clock
delay_us(HalfCycleDelay); // 250kHz Frequency
if(EOC) // Wait for EOC to be High
break;
}

CLK = 0; // Make CLK Low
OE = 1; // Enable Output
delay_us(HalfCycleDelay); // 250kHz Frequency
CLK = 1; // Make CLK High
delay_us(HalfCycleDelay); // 250kHz Frequency
CLK = 0; // Make CLK Low
delay_us(HalfCycleDelay); // 250kHz Frequency
CLK = 1; // Make CLK High

ADC_value = Data_Bus; // Read value

delay_sec(1);

delay_us(HalfCycleDelay); // 250kHz Frequency
OE = 0; // Disable Output
CLK = 0; // Make CLK Low
delay_us(HalfCycleDelay); // 250kHz Frequency
return ADC_value; // Return ADC value
}


// Function for approximate delay in Secs.
void delay_sec(unsigned int d)
{
unsigned int i;
for(i=0;i<(d*20);i++)
delay_us(50000);
}

// Function for approximate delay in given uSecs.
void delay_us(unsigned int d)
{
unsigned int i, limit;
limit = d/15;
for(i=0;i<limit;i++);
}

So basically I wanted to know where I am wrong and if I give the clock from an external source then How can I give it ??
Wed Apr 25 2018, 05:23 PM
#2
I have run your code in a Proteus simulation
and it seems okay.
Do you have Proteus ?

Your code does not display a result, how to you know
your readings are wrong ?
Wed Apr 25 2018, 05:41 PM
#3
Yes, I have Proteus.
In Proteus it is running fine but I am basically getting the issues at the hardware side, when I am trying to interface the 8051 with ADC0808, the analog to digital conversion is not happening.

So basically I wanted to ask about what extra precaution we should take to get the output.

Please also give any additional suggestions if any.
Thu Apr 26 2018, 08:11 PM
#4


In Proteus it is running fine but I am basically getting the
issues at the hardware side, when I am trying to interface
the 8051 with ADC0808, the analog to digital conversion
is not happening.

Pater


It sounds like hardware / wiring problem.
You will have to post your circuit diagram.
How are you displaying your readings ?

Mon May 07 2018, 01:28 PM
#5
Sorry for late reply as exams were on,
Based on my troubleshooting I think there is problem related to the clock of ADC0808.

So can u please suggest the external clock circuit to be used with ADC0808, many of them have used 555-timer IC but I am not able to get the correct values of resistors and capacitors for generating proper clock signal.

Please suggest the solution to the problem.
Mon May 07 2018, 07:27 PM
#6
This design should be fine.
Choose a frequency between 1Khz and 100Khz to start.
http://www.ohmslawcalculator.com/555-astable-calculator

555s tend not to work well at 5 volts.
I would run it at 9-12 volts and limit the voltage applied
to the ADC0808 clock input.

Connect 555 pin3 to ADC0808 pin 10 with a 4.7K resistor.
Connect ADC0808 pin 10 to +5 volts with diode to shunt the excess voltage
on pin 10 to 5 volts.
Or
A voltage divider to drop the voltage to below 5 volts.


[ Edited Wed May 09 2018, 08:25 PM ]

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